cache - How would a word or long word addressable memory system change the outcome?

I was given this question at school:

Suppose a byte-addressable memory has 1 M addressable space and a cache consisting of 64 blocks, where each block contains 8 bytes. The cache is direct mapped.

What is the size of the cache?
How many offset bits?
How many line bits?
How many tag bits?

I understand how to answer these questions, but why do I need to know that the memory is byte addressable?

How would the answers change if it were word or long word addressable?

Answer

What is byte ?

A byte is a memory unit for storage and a memory chip is full of such bytes. Memory units are addressable. That is the only way we can use memory.

In reality memory is only byte addressable. It means a binary address always points to a single byte only. A word is just a group of bytes – 2, 4, 8 depending upon the data bus size of the CPU.

How You need to understand ?

To understand the memory operation fully, you must be familiar with the various registers of the CPU and the memory ports of the RAM. I assume you know the meaning 'MAR memory address register', 'MDR memory data register', 'PC program counter register', 'MBR memory buffer register'. RAM has two memory ports: 32 bit for data/addresses, 8-bit for OPCODE.

Suppose CPU wants to read a word (say 4 bytes) from the address xyz onwards. CPU would put the address on the MAR, sends a memory read signal to the memory controller chip. On receiving the address and read signal, memory controller would connect the data bus to 32-bit port and 4 bytes starting from the address xyz would flow out of the port to the MDR.

If the CPU wants to fetch the next instruction, it would put the address onto the PC register and sends a fetch signal to the memory controller. On receiving the address and fetch signal, memory controller would connect the data bus to 8-bit port and a single byte long opcode located at the address received would flow out of the RAM into the CPU'S MDR.

So that is what it means when we say a certain register is 'memory addressable'or 'byte addressable'. Now what will happen when you put, say decimal 2 in binary on the MAR with an intention to read the 'word' 2 , not (byte no 2)?

Word no 2 means bytes 4, 5, 6, 7 for 32 bit machine. In reality physical memory is byte addressable only. So there is trick to handle 'word addressing'.
When MAR is placed on the address bus, its 32 bits do not map onto the 32 address lines 0-31 respectively. Instead, MAR bit 0 is wired to address bus line 2, MAR bit 1 is wired to address bus line 3 and so on. The upper 2 bits of MAR are discarded since they are only needed for word addresses above 2^32 none of which are legal for our 32 bit machine.
Using this mapping, when MAR is 1, address 4 is put onto the bus, when MAR is 2, address 8 is put onto the bus and so forth.