memory - What does "32GB(8Gbx4DR)" mean in the dumped RAM info?

I dumped my RAM DIMM info. It contains string like 32GB(8Gbx4DR). I know its size is 32GB. What does 8Gbx4DR mean?

And I heard about the concepts like rank, channel, bank. I understand that a rank is the chips that make up the bit width required by the memory controller channel. And rank is made of banks. But how can I map the dumped info to these concepts?

Below is the screenshot of the dumped info:

• This is a server board.


• Each CPU has 2 memory controllers.



• Each memory controller has 3 channels.


• Each channel can support 2 slots of DIMM.

ADD 1

Some reference pages and documents I reviewed regarding RAM setups:

ADD 2

And back to my 32GB(8Gbx4DR) question. Now I believe I can figure it out:

• 1 DRAM chip = 8Gb (lower b) (According to the spec)


• DDR* requires 64-bit channel width. and x4 means a single DRAM chip provides 4-bit width. So 16 DRAM chips are required per RANK to meet the channel width.


• DR means 2/dual ranks per DIMM

So the total size of a DIMM = 2 * 16 * 8Gb = 32GB (upper B)

ADD 3

And if include the ECC (Error Correcting Code), there needs more DRAM chips. For a single byte, a single ECC bit is needed.

For example, with 8Gb x4 DRAM chip, the calculation for a 16GB dual-rank DIMM with ECC is like this. (The important thing is to calculate based on bits.)

The DDR* requires 64-bit width for a rank to serve a channel. And x4 means a single DRAM chip has 4-bit width. So a rank will comprise 64/4 = 16 chips.

With dual ranks, we need 32 DRAM chips.

To achieve a total DIMM capacity of 16GB, the size of each DRAM chips should be 16GB /32 = 16*8 Gb /32 = 4 Gb.

Each 8 bits need a ECC bit, so 16GB needs: 16*8 Gb /8 = 16Gb. ECC can be implemented with DRAM chips as well. And 16Gb is just 4 pieces of 4-Gb DRAM chips.

So in total, we need 32 + 4 = 36 4Gbx4 DRAM chips.

Answer

The x4DR fits within the techspecs and probably Points to the dualrank "feature" of this particular RAM: